Field of the Invention
The present disclosure relates to an organic light-emitting display device, and more particularly, to a method of manufacturing a connection structure connecting a cathode electrode to an auxiliary cathode electrode and an organic light-emitting diode display device using the same.
Discussion of the Related Art
Recently, various flat panel display devices capable of reducing weight and the volume, that is, disadvantages of a cathode ray tube (CRT), are being developed. Examples of such a flat panel display device include a liquid crystal display (LCD), a field emission display (FED), a plasma display panel (PDP), and an organic light-emitting diode display (OLED).
The OLED device of the flat panel display devices is a self-emitting display device that emits light by exciting an organic compound, and has advantages of enabling a light weight thin type and simplifying the process because it does not require a backlight used in an LCD. Furthermore, the OLED device is widely used because it can be fabricated at a low temperature and it has a response speed of 1 ms or less, a high-speed response speed, and characteristics, such as low consumption power, a wide viewing angle, and high contrast.
The OLED device includes an organic light-emitting diode for converting electric energy into light energy. The organic light-emitting diode includes an anode electrode, a cathode electrode, and an organic emission layer (EML) disposed between the electrodes. Holes are injected from the anode electrode, and electrons are injected from the cathode electrode. When the holes and the electrons injected through the anode electrode and the cathode electrode are injected into the organic emission layer EML, excitons are formed, and the excitons emit light while emitting energy in a light form.
Such an OLED device includes gate lines, data lines, and a plurality of pixels partitioned by the crossings of common power lines. Each of the pixels includes a switching thin film transistor (hereinafter referred to as “TFT”), a driving TFT, a storage capacitor, and an organic light-emitting diode. When a scan pulse is supplied to a gate line, the switching TFT is turned on and supplies the storage capacitor and the gate electrode of the driving TFT with a data signal supplied to a data line. The driving TFT adjusts the amount of light emitted from the organic light-emitting diode by controlling an electric current supplied from a power line to the organic light-emitting diode in response to the data signal supplied to the gate electrode of the driving TFT. Although the switching TFT is turned off, the storage capacitor charges a data voltage supplied from the data line through the switching TFT so that the driving TFT supplies a constant current until a data signal of a next frame is supplied and thus the emission of the organic light-emitting diode is maintained.
A related art OLED device is described below with reference to FIGS. 1 and 2. FIG. 1 is a cross-sectional view of some region of the related art OLED device, and FIG. 2 is a cross-sectional view of the OLED device taken along line I-I′ of FIG. 1.
Referring to FIGS. 1 and 2, the OLED device includes a TFT substrate in which TFTs ST and DT and an organic light-emitting diode OLE connected to the TFTs ST and DT and driven are disposed in each pixel region.
The TFT substrate includes a switching TFT ST, a driving TFT DT connected to the switching TFT ST, and the organic light-emitting diode OLE connected to the driving TFT DT. The switching TFT ST is neighboring to and disposed in the intersection of a gate line GL and a data line DL. The switching TFT ST functions to select a pixel. The switching TFT ST includes a gate electrode SG, a semiconductor layer SA, a source electrode SS, and a drain electrode SD branched from the gate line GL.
The driving TFT DT functions to drive the organic light-emitting diode OLE of a pixel selected by the switching TFT ST. The driving TFT DT includes a gate electrode DG connected to the drain electrode SD of the switching TFT ST, a semiconductor layer DA, a source electrode DS connected to a high potential source line VDL, and a drain electrode DD. The drain electrode DD of the driving TFT DT is connected to the anode electrode ANO of the organic light-emitting diode OLE. A cathode electrode CAT covering most of the substrate is disposed on the anode electrode ANO. An organic emission layer OL is disposed between the anode electrode ANO and the cathode electrode CAT.
A gate pad GP connected to one end of the gate line GL, a data pad DP connected to one end of the data line DL, a high potential source pad VDP formed at one end of the high potential source line VDL, and a low potential source pad VSP formed at one end of the low potential source line VSL are disposed in the outer circumferential portion of a display region in which pixels are disposed.
Referring further to FIG. 2, the semiconductor layers SA and DA of the switching TFT ST and the driving TFT DT are formed on the substrate SUB. The gate electrodes SG and DG are formed on a gate insulating film GI covering the semiconductor layers SA and DA. The gate electrodes SG and DG overlap the central portions of the semiconductor layers SA and DA, respectively. The regions of the semiconductor layers SA and DA overlapping the gate electrodes SG and DG may be defined as channel regions. Furthermore, the gate pad GP may be formed on the gate insulating film GI.
One side portions of the semiconductor layers SA and DA are respectively connected to the source electrodes SS and DS through contract holes formed in the gate insulating film GI, and the other side portions thereof are respectively connected to the drain electrodes SD and DD through contract holes formed in the gate insulating film GI. The source electrodes SS and DS and the drain electrodes SD and DD are formed on an insulating film IN covering the gate electrodes SG and DG. A low potential source line VSL is disposed on the insulating film IN. Furthermore, the data pad DP, the high potential source pad VDP, and the low potential source pad VSP may be disposed on the insulating film IN.
A passivation film PAS is formed on the substrate SUB in which the switching TFT ST and the driving TFT DT have been formed. A planarization film PL is formed on the substrate SUB in which the passivation film PAS has been formed.
The anode electrode ANO that comes in contact with the drain electrode DD of the driving TFT DT through a contract hole is formed on the planarization film PL. Furthermore, a gate pad terminal GPT, a data pad terminal DPT, a high potential source terminal VDPT, and a low potential source terminal VSPT respectively connected to the gate pad GP, the data pad DP, the high potential source pad VDP, and the low potential source pad VSP through contract holes that penetrate the insulating film are formed in an outer circumferential portion in which the planarization film PL has not been formed. A bank pattern BA is formed on the substrate SUB in which the anode electrode ANO has been formed. The bank pattern BA exposes most of the anode electrode ANO. The organic emission layer OL is formed on the exposed anode electrode ANO. The cathode electrode CAT is formed on the substrate in which the organic emission layer OL has been formed. Accordingly, the organic light-emitting diode OLE, including the anode electrode ANO, the organic emission layer OL, and the cathode electrode CAT, is formed.
The cathode electrode CAT to which a low potential source voltage is applied through the low potential source line VSL is formed in most of the entire surface of the substrate SUB. If the cathode electrode CAT is placed in an upper layer as in a top-emission display device, the cathode electrode CAT needs to be formed using a transparent conductive material, such as indium tin oxide (ITO), because transmittance needs to be secured. If the cathode electrode CAT is formed using a transparent conductive material, such as ITO, there is a problem in that picture quality is deteriorated because electric resistance is increased.
If resistance increases as described above, there is a problem in that a low potential source voltage does not have a constant voltage value voltage value in the entire area of the cathode electrode. More specifically, in the case of a large-area display device, there is a phenomenon in which luminance becomes irregular over the entire screen because a voltage deviation depending on the position, for example, a voltage deviation depending on the distance from an incoming portion to which the low potential source voltage is applied may be increased.